| /sys/dev/x86/ |
| D | sercons.c | 37 static uint16_t base; variable
42 base = COM1_BASE; in Serial_Init()
46 outb(base + UART_OFFSET_IER, 0); in Serial_Init()
49 outb(base + UART_OFFSET_LCR, UART_LCR_DLAB); in Serial_Init()
50 outb(base + UART_OFFSET_DIVLO, 1); // 115200 Baud in Serial_Init()
51 outb(base + UART_OFFSET_DIVLO, 0); in Serial_Init()
52 outb(base + UART_OFFSET_LCR, UART_LCR_8N1); in Serial_Init()
55 outb(base + UART_OFFSET_IIR, 0xC7); in Serial_Init()
56 outb(base + UART_OFFSET_MCR, 0x0B); in Serial_Init()
75 return (inb(base + UART_OFFSET_LSR) & 0x01) != 0; in Serial_HasData()
[all …]
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| D | ide.c | 59 uint16_t base; // Base Port member
90 primary.base = IDE_PRIMARY_BASE; in IDE_Init()
115 inb(ide->base + IDE_STATUS); in IDEWaitForBusy()
116 inb(ide->base + IDE_STATUS); in IDEWaitForBusy()
117 inb(ide->base + IDE_STATUS); in IDEWaitForBusy()
118 inb(ide->base + IDE_STATUS); in IDEWaitForBusy()
122 status = inb(ide->base + IDE_STATUS); in IDEWaitForBusy()
133 outb(ide->base + IDE_LBALOW, 0x41); in IDE_HasController()
134 outb(ide->base + IDE_LBAMID, 0x4D); in IDE_HasController()
136 if (inb(ide->base + IDE_LBALOW) != 0x41) in IDE_HasController()
[all …]
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| /lib/liblwip/src/core/snmp/ |
| D | asn1_enc.c | 183 u16_t plen, base; in snmp_asn1_enc_type() local
189 base = plen; in snmp_asn1_enc_type()
194 msg_ptr += ofs - base; in snmp_asn1_enc_type()
215 u16_t plen, base; in snmp_asn1_enc_length() local
221 base = plen; in snmp_asn1_enc_length()
226 msg_ptr += ofs - base; in snmp_asn1_enc_length()
310 u16_t plen, base; in snmp_asn1_enc_u32t() local
316 base = plen; in snmp_asn1_enc_u32t()
321 msg_ptr += ofs - base; in snmp_asn1_enc_u32t()
386 u16_t plen, base; in snmp_asn1_enc_s32t() local
[all …]
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| D | asn1_dec.c | 54 u16_t plen, base; in snmp_asn1_dec_type() local
60 base = plen; in snmp_asn1_dec_type()
65 msg_ptr += ofs - base; in snmp_asn1_dec_type()
87 u16_t plen, base; in snmp_asn1_dec_length() local
93 base = plen; in snmp_asn1_dec_length()
98 msg_ptr += ofs - base; in snmp_asn1_dec_length()
242 u16_t plen, base; in snmp_asn1_dec_u32t() local
248 base = plen; in snmp_asn1_dec_u32t()
253 msg_ptr += ofs - base; in snmp_asn1_dec_u32t()
335 u16_t plen, base; in snmp_asn1_dec_s32t() local
[all …]
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| /sys/amd64/ |
| D | xmem.c | 20 uintptr_t base; member
38 regions[r].base = MEM_XMAP_BASE + r * regionSize; in XMem_Init()
69 PMap_SystemLookup(xmem->base + off, &entry, PGSIZE); in XMem_Destroy()
82 return xmem->base; in XMem_GetBase()
109 PMap_SystemMap(DMVA2PA((uint64_t)pg), xmem->base + off, 1, 0); in XMem_Allocate()
127 regions[r].base, regions[r].length); in Debug_XMemStats()
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| D | lapic.c | 70 uint64_t base = rdmsr(IA32_APIC_BASE_MSR) & 0xFFFFFFFFFFFFF000ULL; in LAPIC_GetBase() local
72 return (uint32_t *)DMPA2VA(base); in LAPIC_GetBase()
184 uint64_t base; in LAPIC_Init() local
197 base = rdmsr(IA32_APIC_BASE_MSR); in LAPIC_Init()
198 wrmsr(IA32_APIC_BASE_MSR, base | IA32_APIC_BASE_MSR_ENABLE); in LAPIC_Init()
201 base = DMPA2VA(base); in LAPIC_Init()
205 kprintf("LAPIC: CPU %d found at 0x%016llx\n", LAPIC_CPU(), base); in LAPIC_Init()
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| D | disasm.c | 944 const char * base; member
1040 addrp->base = 0; in db_read_address()
1042 addrp->base = "%eip"; in db_read_address()
1044 addrp->base = "%rip"; in db_read_address()
1047 addrp->base = db_reg[1][size][rm]; in db_read_address()
1054 addrp->base = db_reg[1][size][rm]; in db_read_address()
1060 addrp->base = db_reg[1][size][rm]; in db_read_address()
1078 if (addrp->disp != 0 || (addrp->base == 0 && addrp->index == 0)) in db_print_address()
1080 if (addrp->base != 0 || addrp->index != 0) { in db_print_address()
1082 if (addrp->base) in db_print_address()
[all …]
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| /sys/kern/ |
| D | printf.c | 33 uint64_t num,int base,int width,int padc) in printnum() argument
38 if (base < 0) in printnum()
40 base = -base; in printnum()
42 *p = numberstring_upper[num % base]; in printnum()
44 } while (num /= base); in printnum()
47 *p = numberstring_lower[num % base]; in printnum()
49 } while (num /= base); in printnum()
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| D | palloc.c | 112 uintptr_t base = (uintptr_t)DMVA2PA(start); in PAlloc_AddRegion() local
113 uintptr_t end = base + len; in PAlloc_AddRegion()
121 for (i = 0; i < (base / PGSIZE); i++) { in PAlloc_AddRegion()
124 for (i = (base / PGSIZE); i < (end / PGSIZE); i++) { in PAlloc_AddRegion()
128 pageInfoTable[i + (base / PGSIZE)].refCount = 1; in PAlloc_AddRegion()
138 uintptr_t base = (uintptr_t)DMVA2PA(start); in PAlloc_AddRegion() local
139 uintptr_t end = base + len; in PAlloc_AddRegion()
147 for (i = (base / PGSIZE); i < (end / PGSIZE); i++) { in PAlloc_AddRegion()
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| D | debug.c | 127 int base = 10; in Debug_StrToInt() local
132 base = 16; in Debug_StrToInt()
138 val = val * base + (uint64_t)(s[i] - '0'); in Debug_StrToInt()
140 if (base != 16) in Debug_StrToInt()
142 val = val * base + (uint64_t)(s[i] - 'a' + 10); in Debug_StrToInt()
144 if (base != 16) in Debug_StrToInt()
146 val = val * base + (uint64_t)(s[i] - 'A' + 10); in Debug_StrToInt()
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| D | slab.c | 65 uintptr_t base = XMem_GetBase(slab->xmem); in SlabExtend() local
84 SlabElement *elem = (SlabElement *)(base + len + i * realObjSz); in SlabExtend()
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| /lib/libc/ |
| D | printf.c | 30 uint64_t num,int base,int width,int padc) in printnum() argument
35 if (base < 0) in printnum()
37 base = -base; in printnum()
39 *p = numberstring_upper[num % base]; in printnum()
41 } while (num /= base); in printnum()
44 *p = numberstring_lower[num % base]; in printnum()
46 } while (num /= base); in printnum()
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| D | malloc.c | 28 uint64_t base; member
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| /lib/liblwip/src/core/ipv4/ |
| D | ip_addr.c | 155 u8_t base; in ipaddr_aton() local
170 base = 10; in ipaddr_aton()
174 base = 16; in ipaddr_aton()
177 base = 8; in ipaddr_aton()
181 val = (val * base) + (int)(c - '0'); in ipaddr_aton()
183 } else if (base == 16 && isxdigit(c)) { in ipaddr_aton()
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| /sys/dev/ |
| D | e1000.c | 395 uintptr_t base = VA2PA((uintptr_t)dev->rxDesc); in E1000_RXInit() local
396 MMIO_Write32(dev, E1000_REG_RDBAH, (uint32_t)(base >> 32)); in E1000_RXInit()
397 MMIO_Write32(dev, E1000_REG_RDBAL, (uint32_t)(base & 0xFFFFFFFF)); in E1000_RXInit()
420 uintptr_t base = VA2PA((uintptr_t)dev->txDesc); in E1000_TXInit() local
421 MMIO_Write32(dev, E1000_REG_TDBAH, (uint32_t)(base >> 32)); in E1000_TXInit()
422 MMIO_Write32(dev, E1000_REG_TDBAL, (uint32_t)(base & 0xFFFFFFFF)); in E1000_TXInit()
464 bar, dev.bars[bar].base, dev.bars[bar].size, in E1000_Configure()
468 ethDev->mmiobase = (uint8_t *)DMPA2VA(dev.bars[0].base); in E1000_Configure()
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| D | pci.c | 260 dev->bars[bar].base = 0; in PCI_Configure()
268 uint32_t base, size; in PCI_Configure() local
281 base = origValue & 0xFFFFFFFC; in PCI_Configure()
286 base = origValue & 0xFFFFFFF0; in PCI_Configure()
293 dev->bars[bar].base = base; in PCI_Configure()
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| D | ahci.c | 435 bar, dev.bars[bar].base, dev.bars[bar].size, in AHCI_Configure()
445 hc = (volatile AHCIHostControl *)(uintptr_t)dev.bars[AHCI_ABAR].base; in AHCI_Configure()
480 ahci->port[p] = (AHCIPort *)(uintptr_t)(dev.bars[AHCI_ABAR].base + in AHCI_Configure()
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| /sys/include/ |
| D | pci.h | 50 uint32_t base; member
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| /lib/liblwip/doc/ |
| D | snmp_agent.txt | 23 The standard lwIP stack management information base.
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| /docs/ |
| D | Doxyfile | 165 # operators of the base classes will not be shown.
546 # 'anonymous_namespace{file}', where file will be replaced with the base name of
1337 # that these files will be copied to the base HTML output directory. Use the
2427 # to run in parallel. When set to 0 doxygen will base this on the number of
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| /lib/liblwip/ |
| D | CHANGELOG | 1183 2008-12-03 Simon Goldschmidt (base on patch from Luca Ceresoli)
|