lapic.h File Reference

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Functions
void	LAPIC_Init ()
uint32_t	LAPIC_CPU ()
void	LAPIC_SendEOI ()
void	LAPIC_StartAP (uint8_t apicid, uint32_t addr)
int	LAPIC_Broadcast (int vector)
int	LAPIC_BroadcastNMI (int vector)
void	LAPIC_Periodic (uint64_t rate)

Function Documentation

LAPIC_Broadcast()

int LAPIC_Broadcast

(

int

vector

)

Definition at line 143 of file lapic.c.

{
    int i = 0;
    LAPIC_Write(LAPIC_ICR_LO, LAPIC_ICR_EXCSELF | vector);
 
    while ((LAPIC_Read(LAPIC_ICR_LO) & LAPIC_ICR_DELIVERY_PENDING) != 0) {
        pause();
 
        if (i > 1000000) {
            kprintf("IPI not delivered?\n");
            return -1;
        }
    }
 
    return 0;
}

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LAPIC_BroadcastNMI()

int LAPIC_BroadcastNMI

(

int

vector

)

Definition at line 161 of file lapic.c.

{
    int i = 0;
    LAPIC_Write(LAPIC_ICR_LO, LAPIC_ICR_EXCSELF | LAPIC_ICR_NMI | vector);
 
    while ((LAPIC_Read(LAPIC_ICR_LO) & LAPIC_ICR_DELIVERY_PENDING) != 0) {
        pause();
 
        if (i > 1000000) {
            kprintf("IPI not delivered?\n");
            return -1;
        }
    }
 
    return 0;
}

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LAPIC_CPU()

uint32_t LAPIC_CPU

(

)

Definition at line 93 of file lapic.c.

{
    if (lapicInitialized)
        return LAPIC_Read(LAPIC_ID) >> 24;
    else
        return 0;
}

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LAPIC_Init()

void LAPIC_Init

(

)

Definition at line 179 of file lapic.c.

{
    uint32_t version;
    uint32_t lvts;
    uint32_t edx;
    uint64_t base;
 
    cpuid(1, NULL, NULL, NULL, &edx);
    if ((edx & CPUID_FLAG_APIC) == 0)
        Panic("APIC is required!\n");
 
    // Disable ATPIC
    if (LAPIC_CPU() == 0) {
        outb(0xA1, 0xFF);
        outb(0x21, 0xFF);
    }
 
    // Enable LAPIC
    base = rdmsr(IA32_APIC_BASE_MSR);
    wrmsr(IA32_APIC_BASE_MSR, base | IA32_APIC_BASE_MSR_ENABLE);
 
    // Convert to Direct Map Address
    base = DMPA2VA(base);
 
    lapicInitialized = true;
 
    kprintf("LAPIC: CPU %d found at 0x%016llx\n", LAPIC_CPU(), base);
 
    version = LAPIC_Read(LAPIC_VERSION);
    lvts = (version & LAPIC_VERSION_LVTMASK) >> LAPIC_VERSION_LVTSHIFT;
 
    // Enable interrupts
    LAPIC_Write(LAPIC_SIV, LAPIC_SIV_ENABLE | T_IRQ_SPURIOUS);
 
    // Error Interrupt
    LAPIC_Write(LAPIC_LVT_ERROR, T_IRQ_ERROR);
 
    // Setup LINT0/1
    if (LAPIC_CPU() == 0) {
        LAPIC_Write(LAPIC_LVT_LINT0, LAPIC_LVT_FLAG_EXTINT);
        LAPIC_Write(LAPIC_LVT_LINT1, LAPIC_LVT_FLAG_NMI);
    } else {
        LAPIC_Write(LAPIC_LVT_LINT0, LAPIC_LVT_FLAG_MASKED);
        LAPIC_Write(LAPIC_LVT_LINT1, LAPIC_LVT_FLAG_MASKED);
    }
 
    // Performance Counter Interrupt
    if (lvts >= 4) {
        LAPIC_Write(LAPIC_LVT_PMCR, LAPIC_LVT_FLAG_MASKED);
    }
 
    // Thermal Interrupt
    if (lvts >= 5) {
        LAPIC_Write(LAPIC_LVT_THERMAL, T_IRQ_THERMAL);
    }
 
    // Machine Check Interrupt
    if (lvts >= 6) {
        LAPIC_Write(LAPIC_LVT_CMCI, LAPIC_LVT_FLAG_MASKED);
    }
 
    LAPIC_Periodic(10000000); // XXX: 100 Hz (changes must update trap.c as well)
 
    // Clear any remaining errors
    LAPIC_Write(LAPIC_ESR, 0);
    LAPIC_Write(LAPIC_ESR, 0);
 
    LAPIC_Write(LAPIC_ICR_HI, 0);
    LAPIC_Write(LAPIC_ICR_LO, LAPIC_ICR_INCSELF | LAPIC_ICR_INIT | LAPIC_ICR_TRIG);
    while (LAPIC_Read(LAPIC_ICR_LO) & LAPIC_ICR_DELIVERY_PENDING)
    {
        // XXX: Timeout
    }
 
    LAPIC_SendEOI();
 
    LAPIC_Write(LAPIC_TPR, 0);
}

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LAPIC_Periodic()

void LAPIC_Periodic

(

uint64_t

rate

)

Definition at line 108 of file lapic.c.

{
    LAPIC_Write(LAPIC_TDCR, LAPIC_TDCR_X1);
    LAPIC_Write(LAPIC_LVT_TIMER, LAPIC_LVT_TIMER_PERIODIC | T_IRQ_TIMER);
    LAPIC_Write(LAPIC_TICR, rate);
}

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LAPIC_SendEOI()

void LAPIC_SendEOI

(

)

Definition at line 102 of file lapic.c.

{
    LAPIC_Write(LAPIC_EOI, 0);
}

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LAPIC_StartAP()

void LAPIC_StartAP	(	uint8_t	apicid,
		uint32_t	addr
	)

Definition at line 116 of file lapic.c.

{
    // Setup CMOS stuff
    outb(0x70, 0x0F);
    outb(0x71, 0x0A);
    uint16_t *cmosStartup = (uint16_t *)DMPA2VA(0x467);
    cmosStartup[0] = 0;
    cmosStartup[1] = addr >> 4;
 
    // Send INIT
    LAPIC_Write(LAPIC_ICR_HI, apicid << 24);
    LAPIC_Write(LAPIC_ICR_LO, LAPIC_ICR_INIT | LAPIC_ICR_TRIG | LAPIC_ICR_ASSERT);
    // XXX: Delay
    LAPIC_Write(LAPIC_ICR_HI, apicid << 24);
    LAPIC_Write(LAPIC_ICR_LO, LAPIC_ICR_INIT | LAPIC_ICR_TRIG);
    // XXX: Delay
 
    // Send STARTUP
    LAPIC_Write(LAPIC_ICR_HI, apicid << 24);
    LAPIC_Write(LAPIC_ICR_LO, LAPIC_ICR_STARTUP | (addr >> 12));
    // XXX: Delay
    LAPIC_Write(LAPIC_ICR_HI, apicid << 24);
    LAPIC_Write(LAPIC_ICR_LO, LAPIC_ICR_STARTUP | (addr >> 12));
    // XXX: Delay
}

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