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Data Structures | Macros | Typedefs | Functions
pci.h File Reference

Go to the source code of this file.

Data Structures

struct  PCIBAR
 
struct  PCIDevice
 

Macros

#define PCI_OFFSET_VENDORID   0x00
 
#define PCI_OFFSET_DEVICEID   0x02
 
#define PCI_OFFSET_COMMAND   0x04
 
#define PCI_OFFSET_STATUS   0x06
 
#define PCI_OFFSET_REVISIONID   0x08
 
#define PCI_OFFSET_PROGIF   0x09
 
#define PCI_OFFSET_SUBCLASS   0x0A
 
#define PCI_OFFSET_CLASS   0x0B
 
#define PCI_OFFSET_CACHELINE   0x0C
 
#define PCI_OFFSET_LATENCYTMR   0x0D
 
#define PCI_OFFSET_HEADERTYPE   0x0E
 
#define PCI_OFFSET_BIST   0x0F
 
#define PCI_OFFSET_BARFIRST   0x10
 
#define PCI_OFFSET_BARLAST   0x24
 
#define PCI_OFFSET_IRQLINE   0x3C
 
#define PCI_COMMAND_IOENABLE   0x0001
 
#define PCI_COMMAND_MEMENABLE   0x0002
 
#define PCI_COMMAND_BUSMASTER   0x0004
 
#define PCI_MAX_BARS   6
 
#define PCI_CLASS_STORAGE   0x01
 
#define PCI_CLASS_NETWORK   0x02
 
#define PCI_CLASS_GRAPHICS   0x03
 
#define PCI_CLASS_BRIDGE   0x06
 
#define PCI_CLASS_BUS   0x0C
 
#define PCI_SCLASS_STORAGE_IDE   0x01
 
#define PCI_SCLASS_STORAGE_SATA   0x06
 
#define PCI_SCLASS_BRIDGE_HOST   0x00
 
#define PCI_SCLASS_BRIDGE_ISA   0x01
 
#define PCI_SCLASS_BRIDGE_PCI   0x04
 
#define PCI_SCLASS_BRIDGE_MISC   0x80
 
#define PCI_SCLASS_BUS_FW   0x00
 
#define PCI_SCLASS_BUS_USB   0x03
 
#define PCI_SCLASS_BUS_SMBUS   0x05
 
#define PCIBAR_TYPE_NULL   0
 
#define PCIBAR_TYPE_IO   1
 
#define PCIBAR_TYPE_MEM   2
 

Typedefs

typedef struct PCIBAR PCIBAR
 
typedef struct PCIDevice PCIDevice
 

Functions

void PCI_Init ()
 
uint8_t PCI_CfgRead8 (PCIDevice *dev, uint32_t reg)
 
uint16_t PCI_CfgRead16 (PCIDevice *dev, uint32_t reg)
 
uint32_t PCI_CfgRead32 (PCIDevice *dev, uint32_t reg)
 
void PCI_CfgWrite8 (PCIDevice *dev, uint32_t reg, uint8_t data)
 
void PCI_CfgWrite16 (PCIDevice *dev, uint32_t reg, uint16_t data)
 
void PCI_CfgWrite32 (PCIDevice *dev, uint32_t reg, uint32_t data)
 
uint16_t PCI_GetDeviceID (PCIDevice *dev)
 
uint16_t PCI_GetVendorID (PCIDevice *dev)
 
uint8_t PCI_GetBaseClass (PCIDevice *dev)
 
uint8_t PCI_GetSubClass (PCIDevice *dev)
 
uint8_t PCI_GetHeaderType (PCIDevice *dev)
 
void PCI_Configure (PCIDevice *dev)
 

Data Structure Documentation

◆ PCIBAR

struct PCIBAR

Definition at line 48 of file pci.h.

Collaboration diagram for PCIBAR:
[legend]
Data Fields
uint32_t base
uint32_t size
uint32_t type

◆ PCIDevice

struct PCIDevice

Definition at line 55 of file pci.h.

Collaboration diagram for PCIDevice:
[legend]
Data Fields
PCIBAR bars[PCI_MAX_BARS]
uint8_t bus
uint16_t device
uint8_t func
uint8_t irq
uint8_t slot
uint16_t vendor

Macro Definition Documentation

◆ PCI_CLASS_BRIDGE

#define PCI_CLASS_BRIDGE   0x06

Definition at line 29 of file pci.h.

◆ PCI_CLASS_BUS

#define PCI_CLASS_BUS   0x0C

Definition at line 30 of file pci.h.

◆ PCI_CLASS_GRAPHICS

#define PCI_CLASS_GRAPHICS   0x03

Definition at line 28 of file pci.h.

◆ PCI_CLASS_NETWORK

#define PCI_CLASS_NETWORK   0x02

Definition at line 27 of file pci.h.

◆ PCI_CLASS_STORAGE

#define PCI_CLASS_STORAGE   0x01

Definition at line 26 of file pci.h.

◆ PCI_COMMAND_BUSMASTER

#define PCI_COMMAND_BUSMASTER   0x0004

Definition at line 22 of file pci.h.

◆ PCI_COMMAND_IOENABLE

#define PCI_COMMAND_IOENABLE   0x0001

Definition at line 20 of file pci.h.

◆ PCI_COMMAND_MEMENABLE

#define PCI_COMMAND_MEMENABLE   0x0002

Definition at line 21 of file pci.h.

◆ PCI_MAX_BARS

#define PCI_MAX_BARS   6

Definition at line 24 of file pci.h.

◆ PCI_OFFSET_BARFIRST

#define PCI_OFFSET_BARFIRST   0x10

Definition at line 15 of file pci.h.

◆ PCI_OFFSET_BARLAST

#define PCI_OFFSET_BARLAST   0x24

Definition at line 16 of file pci.h.

◆ PCI_OFFSET_BIST

#define PCI_OFFSET_BIST   0x0F

Definition at line 13 of file pci.h.

◆ PCI_OFFSET_CACHELINE

#define PCI_OFFSET_CACHELINE   0x0C

Definition at line 10 of file pci.h.

◆ PCI_OFFSET_CLASS

#define PCI_OFFSET_CLASS   0x0B

Definition at line 9 of file pci.h.

◆ PCI_OFFSET_COMMAND

#define PCI_OFFSET_COMMAND   0x04

Definition at line 4 of file pci.h.

◆ PCI_OFFSET_DEVICEID

#define PCI_OFFSET_DEVICEID   0x02

Definition at line 3 of file pci.h.

◆ PCI_OFFSET_HEADERTYPE

#define PCI_OFFSET_HEADERTYPE   0x0E

Definition at line 12 of file pci.h.

◆ PCI_OFFSET_IRQLINE

#define PCI_OFFSET_IRQLINE   0x3C

Definition at line 18 of file pci.h.

◆ PCI_OFFSET_LATENCYTMR

#define PCI_OFFSET_LATENCYTMR   0x0D

Definition at line 11 of file pci.h.

◆ PCI_OFFSET_PROGIF

#define PCI_OFFSET_PROGIF   0x09

Definition at line 7 of file pci.h.

◆ PCI_OFFSET_REVISIONID

#define PCI_OFFSET_REVISIONID   0x08

Definition at line 6 of file pci.h.

◆ PCI_OFFSET_STATUS

#define PCI_OFFSET_STATUS   0x06

Definition at line 5 of file pci.h.

◆ PCI_OFFSET_SUBCLASS

#define PCI_OFFSET_SUBCLASS   0x0A

Definition at line 8 of file pci.h.

◆ PCI_OFFSET_VENDORID

#define PCI_OFFSET_VENDORID   0x00

Definition at line 2 of file pci.h.

◆ PCI_SCLASS_BRIDGE_HOST

#define PCI_SCLASS_BRIDGE_HOST   0x00

Definition at line 35 of file pci.h.

◆ PCI_SCLASS_BRIDGE_ISA

#define PCI_SCLASS_BRIDGE_ISA   0x01

Definition at line 36 of file pci.h.

◆ PCI_SCLASS_BRIDGE_MISC

#define PCI_SCLASS_BRIDGE_MISC   0x80

Definition at line 38 of file pci.h.

◆ PCI_SCLASS_BRIDGE_PCI

#define PCI_SCLASS_BRIDGE_PCI   0x04

Definition at line 37 of file pci.h.

◆ PCI_SCLASS_BUS_FW

#define PCI_SCLASS_BUS_FW   0x00

Definition at line 40 of file pci.h.

◆ PCI_SCLASS_BUS_SMBUS

#define PCI_SCLASS_BUS_SMBUS   0x05

Definition at line 42 of file pci.h.

◆ PCI_SCLASS_BUS_USB

#define PCI_SCLASS_BUS_USB   0x03

Definition at line 41 of file pci.h.

◆ PCI_SCLASS_STORAGE_IDE

#define PCI_SCLASS_STORAGE_IDE   0x01

Definition at line 32 of file pci.h.

◆ PCI_SCLASS_STORAGE_SATA

#define PCI_SCLASS_STORAGE_SATA   0x06

Definition at line 33 of file pci.h.

◆ PCIBAR_TYPE_IO

#define PCIBAR_TYPE_IO   1

Definition at line 45 of file pci.h.

◆ PCIBAR_TYPE_MEM

#define PCIBAR_TYPE_MEM   2

Definition at line 46 of file pci.h.

◆ PCIBAR_TYPE_NULL

#define PCIBAR_TYPE_NULL   0

Definition at line 44 of file pci.h.

Typedef Documentation

◆ PCIBAR

typedef struct PCIBAR PCIBAR

◆ PCIDevice

typedef struct PCIDevice PCIDevice

Function Documentation

◆ PCI_CfgRead16()

uint16_t PCI_CfgRead16 ( PCIDevice *  dev,
uint32_t  reg 
)

Definition at line 71 of file pci.c.

72{
73 return PCICfgRead16(dev->bus, dev->slot, dev->func, reg);
74}
PCICfgRead16
uint16_t PCICfgRead16(uint32_t bus, uint32_t slot, uint32_t func, uint32_t reg)
Definition: pci.c:31
PCIDevice::slot
uint8_t slot
Definition: pci.h:61
PCIDevice::func
uint8_t func
Definition: pci.h:62
PCIDevice::bus
uint8_t bus
Definition: pci.h:60
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◆ PCI_CfgRead32()

uint32_t PCI_CfgRead32 ( PCIDevice *  dev,
uint32_t  reg 
)

Definition at line 77 of file pci.c.

78{
79 return PCICfgRead32(dev->bus, dev->slot, dev->func, reg);
80}
PCICfgRead32
uint32_t PCICfgRead32(uint32_t bus, uint32_t slot, uint32_t func, uint32_t reg)
Definition: pci.c:43
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◆ PCI_CfgRead8()

uint8_t PCI_CfgRead8 ( PCIDevice *  dev,
uint32_t  reg 
)

Definition at line 65 of file pci.c.

66{
67 return PCICfgRead8(dev->bus, dev->slot, dev->func, reg);
68}
PCICfgRead8
uint8_t PCICfgRead8(uint32_t bus, uint32_t slot, uint32_t func, uint32_t reg)
Definition: pci.c:21
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◆ PCI_CfgWrite16()

void PCI_CfgWrite16 ( PCIDevice *  dev,
uint32_t  reg,
uint16_t  data 
)

Definition at line 89 of file pci.c.

90{
91 return PCICfgWrite16(dev->bus, dev->slot, dev->func, reg, data);
92}
PCICfgWrite16
void PCICfgWrite16(uint32_t bus, uint32_t slot, uint32_t func, uint32_t reg, uint16_t data)
Definition: pci.c:66
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◆ PCI_CfgWrite32()

void PCI_CfgWrite32 ( PCIDevice *  dev,
uint32_t  reg,
uint32_t  data 
)

Definition at line 95 of file pci.c.

96{
97 return PCICfgWrite32(dev->bus, dev->slot, dev->func, reg, data);
98}
PCICfgWrite32
void PCICfgWrite32(uint32_t bus, uint32_t slot, uint32_t func, uint32_t reg, uint32_t data)
Definition: pci.c:77
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◆ PCI_CfgWrite8()

void PCI_CfgWrite8 ( PCIDevice *  dev,
uint32_t  reg,
uint8_t  data 
)

Definition at line 83 of file pci.c.

84{
85 return PCICfgWrite8(dev->bus, dev->slot, dev->func, reg, data);
86}
PCICfgWrite8
void PCICfgWrite8(uint32_t bus, uint32_t slot, uint32_t func, uint32_t reg, uint8_t data)
Definition: pci.c:55
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◆ PCI_Configure()

void PCI_Configure ( PCIDevice *  dev)

Definition at line 249 of file pci.c.

250{
251 int bar;
252
253 dev->irq = PCI_CfgRead8(dev, PCI_OFFSET_IRQLINE);
254
255 PCI_CfgWrite16(dev, PCI_OFFSET_COMMAND,
256 PCI_COMMAND_IOENABLE | PCI_COMMAND_MEMENABLE | PCI_COMMAND_BUSMASTER);
257
258 for (bar = 0; bar < PCI_MAX_BARS; bar++)
259 {
260 dev->bars[bar].base = 0;
261 dev->bars[bar].size = 0;
262 dev->bars[bar].type = PCIBAR_TYPE_NULL;
263 }
264
265 for (bar = 0; bar < PCI_MAX_BARS; bar++)
266 {
267 uint32_t barReg = PCI_OFFSET_BARFIRST + 4 * bar;
268 uint32_t base, size;
269 uint32_t origValue = PCI_CfgRead32(dev, barReg);
270
271 PCI_CfgWrite32(dev, barReg, 0xFFFFFFFF);
272 size = PCI_CfgRead32(dev, barReg);
273 if (size == 0)
274 continue;
275
276 PCI_CfgWrite32(dev, barReg, origValue);
277
278 if (origValue & 0x1)
279 {
280 dev->bars[bar].type = PCIBAR_TYPE_IO;
281 base = origValue & 0xFFFFFFFC;
282 size = size & 0xFFFFFFFC;
283 size = ~size + 1;
284 } else {
285 dev->bars[bar].type = PCIBAR_TYPE_MEM;
286 base = origValue & 0xFFFFFFF0;
287 size = size & 0xFFFFFFF0;
288 size = ~size + 1;
289 // XXX: Support 64-bit
290 ASSERT((origValue & 0x06) == 0x00);
291 }
292
293 dev->bars[bar].base = base;
294 dev->bars[bar].size = size;
295 }
296}
PCI_CfgWrite32
void PCI_CfgWrite32(PCIDevice *dev, uint32_t reg, uint32_t data)
Definition: pci.c:95
PCI_CfgWrite16
void PCI_CfgWrite16(PCIDevice *dev, uint32_t reg, uint16_t data)
Definition: pci.c:89
PCI_CfgRead32
uint32_t PCI_CfgRead32(PCIDevice *dev, uint32_t reg)
Definition: pci.c:77
PCI_CfgRead8
uint8_t PCI_CfgRead8(PCIDevice *dev, uint32_t reg)
Definition: pci.c:65
ASSERT
#define ASSERT(_x)
Definition: kassert.h:8
size
uint32_t size
Definition: multiboot.h:0
PCI_COMMAND_MEMENABLE
#define PCI_COMMAND_MEMENABLE
Definition: pci.h:21
PCI_OFFSET_BARFIRST
#define PCI_OFFSET_BARFIRST
Definition: pci.h:15
PCI_MAX_BARS
#define PCI_MAX_BARS
Definition: pci.h:24
PCI_OFFSET_IRQLINE
#define PCI_OFFSET_IRQLINE
Definition: pci.h:18
PCIBAR_TYPE_NULL
#define PCIBAR_TYPE_NULL
Definition: pci.h:44
PCIDevice::irq
uint8_t irq
Definition: pci.h:64
PCIBAR_TYPE_IO
#define PCIBAR_TYPE_IO
Definition: pci.h:45
PCI_COMMAND_BUSMASTER
#define PCI_COMMAND_BUSMASTER
Definition: pci.h:22
PCIDevice::bars
PCIBAR bars[PCI_MAX_BARS]
Definition: pci.h:66
PCI_OFFSET_COMMAND
#define PCI_OFFSET_COMMAND
Definition: pci.h:4
PCIBAR::base
uint32_t base
Definition: pci.h:50
PCIBAR_TYPE_MEM
#define PCIBAR_TYPE_MEM
Definition: pci.h:46
PCIBAR::size
uint32_t size
Definition: pci.h:51
PCI_COMMAND_IOENABLE
#define PCI_COMMAND_IOENABLE
Definition: pci.h:20
PCIBAR::type
uint32_t type
Definition: pci.h:52
base
static uint16_t base
Definition: sercons.c:37
uint32_t
unsigned int uint32_t
Definition: types.h:12
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◆ PCI_GetBaseClass()

uint8_t PCI_GetBaseClass ( PCIDevice *  dev)

Definition at line 113 of file pci.c.

114{
115 return PCI_CfgRead8(dev, PCI_OFFSET_CLASS);
116}
PCI_OFFSET_CLASS
#define PCI_OFFSET_CLASS
Definition: pci.h:9
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◆ PCI_GetDeviceID()

uint16_t PCI_GetDeviceID ( PCIDevice *  dev)

Definition at line 101 of file pci.c.

102{
103 return PCI_CfgRead16(dev, PCI_OFFSET_DEVICEID);
104}
PCI_CfgRead16
uint16_t PCI_CfgRead16(PCIDevice *dev, uint32_t reg)
Definition: pci.c:71
PCI_OFFSET_DEVICEID
#define PCI_OFFSET_DEVICEID
Definition: pci.h:3
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◆ PCI_GetHeaderType()

uint8_t PCI_GetHeaderType ( PCIDevice *  dev)

Definition at line 125 of file pci.c.

126{
127 return PCI_CfgRead8(dev, PCI_OFFSET_HEADERTYPE);
128}
PCI_OFFSET_HEADERTYPE
#define PCI_OFFSET_HEADERTYPE
Definition: pci.h:12
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◆ PCI_GetSubClass()

uint8_t PCI_GetSubClass ( PCIDevice *  dev)

Definition at line 119 of file pci.c.

120{
121 return PCI_CfgRead8(dev, PCI_OFFSET_SUBCLASS);
122}
PCI_OFFSET_SUBCLASS
#define PCI_OFFSET_SUBCLASS
Definition: pci.h:8
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◆ PCI_GetVendorID()

uint16_t PCI_GetVendorID ( PCIDevice *  dev)

Definition at line 107 of file pci.c.

108{
109 return PCI_CfgRead16(dev, PCI_OFFSET_VENDORID);
110}
PCI_OFFSET_VENDORID
#define PCI_OFFSET_VENDORID
Definition: pci.h:2
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◆ PCI_Init()

void PCI_Init ( )

Definition at line 27 of file pci.c.

28{
29 kprintf("PCI: Initializing ...\n");
30 PCIScan();
31 kprintf("PCI: Initialization Done!\n");
32}
PCIScan
static void PCIScan()
Definition: pci.c:226
kprintf
int kprintf(const char *fmt,...)
Definition: printf.c:210